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About this paper
Barry de Bruin, Zoran Zivkovic, Henk Corporaal
A quantization methodology is developed for Deep Neural Networks that explicitly considers hardware accumulator size, enabling efficient deployment on resource-constrained embedded devices. This approach allows 16-bit accumulators to achieve near-floating-point accuracy while yielding a 2x performance improvement on ARM processors.
Key insights
- Accumulator width imposes a direct relationship between the maximum bit widths of weights and input data, necessitating careful co-optimization to prevent overflow.
- Optimizing quantization specifically for accumulator constraints allows for maximizing the precision of operands within hardware limits, which can preserve accuracy.
- Different layers within a neural network exhibit varying sensitivities to quantization, enabling layer-wise optimization of bit widths for better overall performance.
Summary by alphaXiv.
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