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About this paper
Adel Ejjeh, Vikram Adve, Rob Rutenbar
The authors evaluate Intel’s Altera OpenCL Compiler on a five-stage camera image-processing pipeline, comparing automatic optimization with manual loop restructuring on an FPGA. Directives and pipelining alone leave the detailed full-pipeline result 3.3× slower than a single-threaded CPU; manual tuning is reported as 21× faster, though the paper’s summary says 4.6×. In Gamut Map, six-way unrolling reaches about 36× speedup; findings are limited to this setup.
Summary by alphaXiv.
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