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About this paper
Tianqi Tang, Yuan Xie
A comprehensive analytical cost model is presented for 2.5D chiplet-based System-in-Package systems, enabling designers to estimate manufacturing costs across various integration options and technology nodes; it demonstrates that hybrid technology node chiplets can offer up to 77% cost efficiency over monolithic designs for large systems.
Key insights
- Organic interposers are more cost-effective than silicon interposers for integrating high-bandwidth components like HBM, showing consistently lower cost overheads (less than 50% relative to core die manufacturing cost).
- Strategic partitioning of systems into multiple chiplets, particularly by separating core logic (advanced node) and I/O circuits (mature node), yields substantial cost efficiency improvements over monolithic designs.
- The optimal granularity of chiplet partitioning and the associated cost benefits both increase with the overall scale (total transistor count) of the system.
Summary by alphaXiv.
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