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About this paper
Matheus Cavalcante, Domenic Wüthrich, Matteo Perotti, Samuel Riedel, Luca Benini
Spatz, a compact 32-bit vector processing unit from ETH Zürich, is introduced to enhance performance and energy efficiency in shared-L1 many-core clusters by mitigating the Von Neumann Bottleneck. Integrated into the MemPool system, Spatz-based configurations achieve up to 71% higher peak performance and over double the energy efficiency compared to scalar-only systems, while reducing overall power consumption by 18%.
Key insights
- Vector processing, even in a lean embedded form factor like Spatz, effectively mitigates the Von Neumann Bottleneck by amortizing instruction fetch/decode costs, leading to higher instruction fetch efficiency.
- A centralized, multi-banked Vector Register File (VRF) acting as an L0 memory significantly improves data locality within the vector processing unit, reducing power consumption in interconnects and L1 shared memory.
- The design demonstrates that reallocating energy overhead from instruction fetching and decoding to computation itself is a viable strategy for achieving high performance and energy efficiency in many-core systems.
Summary by alphaXiv.
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