Reproduce “ReDas: A Lightweight Architecture for Supporting Fine-Grained Reshaping and Multiple Dataflows on Systolic Array” on OpenResearch
Turn your favorite coding agents into research agents that review literature, develop hypotheses, and run experiments.
Universal app for Apple silicon and Intel. Requires macOS 11 or later.
About this paper
Meng Han, Liang Wang, Limin Xiao, Tianhao Cai, Zeyu Wang, Xiangrong Xu, Chenhao Zhang
ReDas adapts a systolic array’s logical shape and dataflow across DNN layers using neighboring-PE links and reassignable buffers. Its 128×128 design supports three dataflows. Across eight workloads, modeled execution is 4.6× faster than a fixed TPU array, with an 8.3× reduction in energy-delay product; these are accelerator evaluation results, not deployed-hardware measurements.
Summary by alphaXiv.
Tip: change arxiv.org to autoarxiv.org in any arXiv abstract link to open the paper here.