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About this paper
Andrew Sabot, Vikas Natesh, H.T. Kung, Wei-Te Ting
MEMA, developed by Harvard University, introduces an analytical runtime framework that minimizes external memory accesses for matrix multiplication on TinyML microcontrollers. This framework achieves up to 1.8x higher throughput and 44% less energy consumption compared to state-of-the-art libraries like CMSIS-NN, enabling more efficient and capable edge AI.
Key insights
- Minimizing external memory accesses is more critical than solely reducing floating-point operations (FLOPs) for TinyML systems, as I/O often constitutes the primary bottleneck for energy and latency.
- An analytical approach to deriving optimal schedules, based on hardware roofline models and local memory constraints, can consistently outperform heuristic search methods for diverse TinyML configurations.
- Strategic data reuse through optimal tile shaping, operand streaming (stationary vs. streamed data), and loop order selection significantly enhances efficiency and energy savings on resource-constrained devices.
Summary by alphaXiv.
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