Reproduce “Exploiting On-chip Heterogeneity of Versal Architecture for GNN Inference Acceleration” on OpenResearch

About this paper

Paul Chen, Pavan Manjunath, Sasindu Wijeratne, Bingyi Zhang, Viktor Prasanna

Researchers at the University of Southern California developed a GNN inference accelerator that harnesses the on-chip heterogeneity of AMD Versal ACAP, achieving average speedups of 12.9x over PyG-GPU and 9.9x over prior ACAP designs. The system dynamically maps dense computations to AI Engines and sparse ones to Programmable Logic, optimizing for varying data sparsity in GNNs.

Key insights

• Optimal GNN acceleration on heterogeneous platforms like Versal ACAP is achieved by dynamically mapping sparse and dense computation primitives to specialized hardware units (PL for sparse, AIE for dense).
• Exploiting sparsity across all GNN computation kernels (adjacency matrix, vertex features, and weight matrices) significantly reduces FLOPs and data movement, leading to substantial performance gains.
• An efficient, lightweight runtime system with dynamic task scheduling based on data sparsity can effectively orchestrate heterogeneous resources with minimal overhead (less than 1% of total execution time).

Summary by alphaXiv.