Reproduce “Spatz: Clustering Compact RISC-V-Based Vector Units to Maximize Computing Efficiency” on OpenResearch
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About this paper
Matteo Perotti, Samuel Riedel, Matheus Cavalcante, Luca Benini
An open-source RISC-V vector unit, Spatz, is integrated into a shared-L1 cluster to maximize computing efficiency. This architecture, featuring a compact, latch-based Vector Register File, achieves high energy and area efficiency (up to 171 GFLOPS_DP/W/mm^2) and significant speed-ups for data-parallel AI workloads, demonstrating that small L0 memories effectively reduce L1 bandwidth requirements.
Key insights
- Compact, latch-based Vector Register Files (VRFs) act as energy-efficient L0 memories, significantly reducing L1 data bandwidth requirements through improved data reuse for compute-intensive workloads.
- An optimal Vector Length (VLENB) of 64 Bytes (resulting in a 2 KiB VRF per PE) maximizes the shared-L1 cluster's energy efficiency (106.4 GFLOPS_DP/W) for double-precision matrix multiplication.
- The scalar core's instruction dispatch overhead is negligible (under 1% of total energy) in such compact vector processors, highlighting the efficiency of focusing on Data Level Parallelism.
Summary by alphaXiv.
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