Reproduce “Analog Circuit Sizing Using Machine Learning Based Transistor Circuit Model” on OpenResearch
Turn your favorite coding agents into research agents that review literature, develop hypotheses, and run experiments.
Universal app for Apple silicon and Intel. Requires macOS 11 or later.
About this paper
Alireza Bagheri Rajeoni
Alireza Bagheri Rajeoni presents a methodology to accelerate analog circuit design by integrating traditional transistor models with regression-based machine learning. The approach predicts threshold voltage (Vth) and mobility-oxide capacitance product ( Cox) as functions of transistor dimensions, reducing reliance on iterative simulations. Applied to a Current Feedback Instrumentation Amplifier, the method achieved a gain of 8.17 V/V, GBW of 6 MHz, and power consumption of 5.76 W.
Key insights
- Hybridizing established circuit theory with machine learning can efficiently address the non-linear complexities of modern transistors.
- Regression models can accurately predict fundamental transistor parameters (Vth, Cox) across a range of dimensions, with errors typically under 3% for Vth and under 9% for Cox in specified ranges.
- Pre-modeling transistor behavior using ML allows for direct sizing calculations, significantly reducing analog design time compared to iterative simulation methods.
Summary by alphaXiv.
Tip: change arxiv.org to autoarxiv.org in any arXiv abstract link to open the paper here.