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About this paper
Limin Jiang, Yi Shi, Yintao Liu, Qingyu Deng, Siyi Xu, Yihao Shen, Fangfang Ye, Shan Cao and 1 more
Researchers from Shanghai University developed a hierarchical dataflow-driven heterogeneous architecture for wireless baseband processing, featuring a cache-free NUMA design and a "pack-and-ship" data dispatch system. This architecture achieves up to 2.3 times faster performance for key kernels compared to commercial DSPs and GPUs, and its prototype demonstrates a 288 Mbps link-level throughput, addressing significant 5G requirements.
Key insights
- The inherently predictable, cyclical, and modular nature of wireless baseband processing can be best exploited by a domain-specific, hierarchical dataflow architecture, leading to superior efficiency over general-purpose solutions.
- Eliminating caches in favor of a cache-free Non-Uniform Memory Access (NUMA) architecture with a "pack-and-ship" data dispatch mechanism drastically reduces memory latency and power consumption for WBP workloads.
- Multi-level scheduling schemes, incorporating multi-threading, lazy-deletion for dependency graph reuse, and runtime dependency graph adjustments, are crucial for effectively managing heterogeneous resources and maximizing system throughput.
Summary by alphaXiv.
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