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About this paper

Yi Xu, Suyash Mahar, Ziheng Liu, Mingyao Shen, Steven Swanson

Researchers from UC Berkeley and UC San Diego define a comprehensive failure model for Compute Express Link (CXL) shared memory systems and propose specific mitigation techniques for data and process failures. Their work identifies limitations of applying traditional fault tolerance to CXL's unique architecture and outlines co-designed solutions with analyzed performance characteristics to enable robust CXL system development.

Key insights

  • CXL's disaggregated memory and cache-coherence create a unique hybrid failure model distinct from traditional single-machine or distributed systems, necessitating tailored fault-tolerance approaches.
  • Directly applying traditional replication/erasure coding or persistent memory (PMEM) fault tolerance to CXL is inefficient due to CXL's load/store access and volatile memory nature, requiring architectural adaptations.
  • Co-designing solutions that address both data and process failures simultaneously can lead to simplified implementations and improved efficiency by leveraging inherent synergies between mitigation mechanisms.

Summary by alphaXiv.

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