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About this paper
Zhuorui Zhao, Ruidi Qiu, Ing-Chao Lin, Grace Li Zhang, Bing Li, Ulf Schlichtmann
The VRank framework enhances Verilog code generation from large language models by introducing an automated self-consistency pipeline for selecting functionally correct candidates. It achieves an average increase of 10.5% in pass@1 accuracy across various LLMs by clustering and ranking generated code based on simulation output consistency.
Key insights
- Simulation output consistency strongly correlates with functional correctness, making it a reliable indicator for selecting high-quality LLM-generated Verilog code.
- A strict, all-or-nothing loss function for consistency proves more effective for ranking clusters than a case-wise consistency metric.
- Chain-of-Thought reasoning can effectively resolve subtle disagreements between top-ranked clusters, further improving the accuracy of the final code selection.
Summary by alphaXiv.
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