Reproduce “Masked Gated Linear Unit” on OpenResearch
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About this paper
Yukito Tajima, Nakamasa Inoue, Yusuke Sekikawa, Ikuro Sato, Rio Yokota
Researchers at the Institute of Science Tokyo and Denso IT Laboratory developed Masked Gated Linear Units (MGLUs) and an optimized FlashMGLU CUDA kernel to enhance Large Language Model inference efficiency. This approach reduces FFN memory bandwidth by 47% and achieves up to 1.51x faster inference compared to standard GLUs, while maintaining or surpassing model accuracy.
Key insights
- The expressivity of Gated Linear Units can be maintained or improved by partitioning a single shared weight matrix using learned binary masks, rather than requiring two distinct weight matrices.
- Integrating a Mixture of Element-wise Gating (MoEG) within MGLUs enhances representational capacity by allowing multiple complementary mask pairs to operate on the same shared weights.
- Practical efficiency gains from architectural innovations like MGLU necessitate custom, hardware-aware kernel optimizations that fuse operations and minimize high-bandwidth memory access.
Summary by alphaXiv.
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