Reproduce “Hardware-efficient tractable probabilistic inference for TinyML Neurosymbolic AI applications” on OpenResearch

About this paper

Jelin Leslin, Martin Trapp, Martin Andraud

Researchers from Aalto University and UC Louvain developed a framework for deploying Neurosymbolic AI models, specifically tractable probabilistic circuits, on resource-constrained TinyML hardware. Their novel `n`-th root transformation technique prevents numerical underflow, enabling the use of native low-precision arithmetic to achieve substantial hardware resource savings and performance speedups on FPGAs and microcontrollers.

Key insights

• Deterministic Probabilistic Circuits possess a 'uniform weight multiplication' property, allowing for exact scaling of all probabilities in the circuit through an `n`-th root transformation.
• This transformation effectively maps the dynamic range of small probabilities to a higher range compatible with the underflow thresholds of low-precision arithmetic units.
• Combining a carefully selected probabilistic model (det-PCs) with the `n`-th root transformation enables exact probabilistic inference on off-the-shelf TinyML hardware without requiring approximations or custom arithmetic units.

Summary by alphaXiv.