Reproduce “Platinum: Path-Adaptable LUT-Based Accelerator Tailored for Low-Bit Weight Matrix Multiplication” on OpenResearch

About this paper

Haoxuan Shan, Cong Guo, Chiyue Wei, Feng Cheng, Junyao Zhang, Yiran Chen, Yiran Chen

Duke University researchers developed Platinum, an energy-efficient ASIC accelerator utilizing a novel disaggregated path-based LUT construction framework and an adaptable architecture to accelerate low-bit weight matrix multiplication, particularly for ternary quantized LLMs. The accelerator achieves up to 4.09x speedup and 3.23x energy savings over state-of-the-art baselines for BitNet-b1.58 3B while occupying 0.96 mm² of chip area.

Key insights

• Disaggregating complex LUT path generation to an offline stage significantly reduces runtime overhead and allows for greater parallelism and hardware utilization.
• Tailoring the accelerator's execution path and LUT structure for specific ultra-low-bit quantization schemes, such as ternary weights, yields substantial performance and energy efficiency benefits over generic bit-serial approaches.
• Memory access, particularly to off-chip DRAM and on-chip weight buffers, is the dominant factor in both area footprint and power consumption for LUT-based accelerators, emphasizing the importance of efficient dataflow and compact representations.

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