Reproduce “FP8 is All You Need (Part 1): Debunking Hardware FP64 as the HPC Holy Grail (Sep 3rd version)” on OpenResearch

About this paper

Satoshi Matsuoka

A performance and architecture framework evaluates whether FP8 tensor cores, combined with Ozaki II residue-based arithmetic, can replace native FP64 as the main matrix-computation substrate for selected HPC workloads. The Tensor–Memory Equilibrium model predicts memory-roof execution for several fused kernels under sufficient conversion and reconstruction throughput, while identifying low-intensity SpMV, single-RHS GEMV, large-square GEMM, and FFT epilogues as cases where conversion or auxiliary integer work remains limiting.

Key insights

• FP8 emulation is viable only as a conditional architecture strategy: fused traffic, adequate deconstruction throughput, enough tensor capacity, and amortized reconstruction are all required to reach the memory roof.
• Input conversion is not a minor post-processing cost. With a modeled c_q=16, the B300 conversion threshold is about 0.42 FLOPs/byte, making SpMV at 0.2 FLOPs/byte and single-RHS GEMV conversion-bound.
• The main bottleneck shifts across kernel shapes: streamed sparse and stencil workloads depend on integer conversion, large dense GEMM can be limited by repeated deconstruction, and 3D FFTs suffer from an integer-SIMT epilogue.

Summary by alphaXiv.