Reproduce “ThermoDSE: A Thermal-Aware and Comprehensive Design Space Exploration for Chiplet-Based DNN Accelerators” on OpenResearch
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About this paper
Jian Peng, Hanwei Fan, Jingbo Jiang, Lin Jiang, Wei Zhang
ThermoDSE introduces a thermal-aware design space exploration framework for chiplet-based DNN accelerators, identifying optimal configurations that balance performance, energy efficiency, and manufacturing yield under thermal and area constraints. The framework achieved up to a 3.5x lower Energy-Delay-Inverse-Yield (EDYP) cost and 29.4x faster convergence compared to existing baselines.
Key insights
- Fine-grained task orchestration and inter-core data reuse capabilities significantly enhance performance and energy efficiency by reducing expensive DRAM accesses.
- Optimal designs for chiplet-based DNN accelerators frequently reside near the boundaries of thermal and interposer area constraints, underscoring the necessity of a constraint-aware DSE approach.
- The proposed TED+SCBO algorithm offers superior efficiency, finding near-optimal design points with significantly fewer iterations than traditional DSE methods like simulated annealing or reinforcement learning.
Summary by alphaXiv.
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