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About this paper
Zhuorui Zhao, Bing Li, Yu Li, Zheyu Yan, Ulf Schlichtmann
VClare addresses defective hardware specifications using two repair routes: an LLM edits localized wording conflicts with human confirmation, or generates Verilog candidates and selects by simulated behavioral agreement. On ComplexVDB-Defect, Sim-Level Repair raises Pass@1 from 34.2% to 49.8% and from 28.1% to 39.9%. Agreement on generated tests does not prove intended behavior.
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