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About this paper
Tairan Cheng, Yi Liu, Dongsheng Zuo, Zhengyuan Shi, Hongji Zhang, Xiangfei Hu, Maoshuo He, Hao Yan and 1 more
The authors introduce HINT, an executable hardware-intent representation that makes architectural choices explicit and checkable before RTL generation. In a controlled seven-case operator study, HINT produced contract-compliant synthesizable RTL in 7/7 cases without post-synthesis quality-of-results refinement. It had lower area and improved area–delay product than five accepted Direct C2RTL results; larger designs provide feasibility, not controlled comparisons.
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