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About this paper
Pasindu Dodampegama, Praveen Wijesinghe, Naveen Basnayake, Keshawa Jayasundara, Tharindu Bandaragoda
cktFormer generates analog circuit topologies by proposing components and their electrical connections with separate models. It represents circuits as graphs, predicts components and pin-level connections, and refines the resulting adjacency matrix. On the AnalogGenie test setup, its combined model produced 76.0% structurally valid circuits, versus 73.5% for AnalogGenie; validity does not establish target performance.
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