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About this paper

Hyojun Ahn, Joongheon Kim

The authors analyze sequential amplitude re-uploading, repeating input state preparation between trainable circuit blocks. Each upload expands the reachable polynomial order by two, while adding gate cost and circuit depth. In simulations, two uploads raise test R² on an order-four synthetic target from 0.689 to 0.883, but not on quadratic targets or handwritten digits.

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